14 DAY TRIAL // NEC Electronics, working jointly with Elpida Memory and Oki Electric, has developed a new packaging technology that will allow cell phones and other portable devices to be equipped with as much memory as a high-performance computer. The new technology involves the placement of eight memory chips and one controller chip in a vertical stack, with 3D connections between the chips.
The key feature of the new technology is the way in which chips in the stack are connected. Each chip has more than 1,000 pins on each side. The pins are connected to polysilicon electrodes built into the chips themselves, vertically piercing the chips from top to bottom. The chips are then connected to each other by high-density microbumps spaced only 50 micrometers apart. The entire package - including the controller chip - is very compact because each of the eight memory chips is only 50 micrometers thick.
From PCs and network servers to digital music players and cell phones, every type of electronic device needs more memory to support the latest applications. For applications like digital video and 3D games, mobile devices also need faster access to memory and power consumption as low as possible. Chip suppliers have developed a number of ways to meet these requirements. Memory can be built into system-on-chip (SoC) solutions, or included in system-in-package (SiP) solutions. The SiP approach typically involves stacking a number of memory chips over interposers and connecting them to a processor chip by wire bonding. But each of these approaches has its disadvantages. It is difficult to build enough memory into a single SoC chip. The wire bonding in SiP solutions creates impedance balancing problems and limits the number of pins that can be connected to the processor, which makes it difficult to increase the signal speed. Wire bonding also limits the number of chips that can be added to the stack.
In search of a fundamental solution to these problems, NEC Electronics, Elpida Memory and Oki Electric initiated a stacked memory development project in June 2004, supported by a grant from the New Energy and Industrial Technology Development Organization. The research focused on packaging innovations and fabrication of the through-chip polysilicon electrodes. The result was the development of this new packaging technology, that will enable smaller form factors, faster operating speeds and lower power consumption in the next generation of mobile devices.
The three companies are working to further enhance the technology and bring it to market as soon as possible.