14 DAY TRIAL // After talking about their plans to introduce an external version of PCI Express that is set to rival Intel's Thunderbolt high-speed interconnect, PCI SIG has started working on a new standard, namely PCI Express 4.0, that will increase the bandwidth available to the add-on cards using it.
The announcement was made by Al Yanes chairmen of PCI-SIG (PCI Special Interest Group) in a press briefing at the group's annual developers conference.
"The initial report we got yesterday is a PCI Express 4.0 is feasible - we have to work out the details, but it is feasible," said Mr. Yanes.
In order to develop this new standard, PCI SIG has already formed an exploratory group that includes members from companies such as AMD, Hewlett-Packard, IBM and Intel.
According to EETimes, these are conducting various simulations using chip, channel, packet and socket data and have determined that a throughput of at least 16 GT/s is feasible for PCIe Gen 4. The experts are expected to deliver a final report until the end of this year.
Right now, it seems that in order to achieve the high transfer speeds that are required by the fourth iteration of PCI Express, scientists will have to focus more on the board-level channels through which the signal passes and less on developing specialized chips.
As a result, PCI Express Gen 4 may be limited to distances about eight to 12 inches in length, compared to the maximum 20 inches that can be covered by PCIe Gen 3.
In addition to increasing the transfer speeds of the standard, scientist will also look into reducing the latencies of PCIe Gen 4 as well as into other aspects of the standards such as forward error correction, deeper pipelining and error reporting and control.
The PCI Express 3.0 specifications were released in November of last year and PCI SIG is targeting a four-year release cycle for PCI Express, so Gen 4 is expected in late 2014 or early 2015.