14 DAY TRIAL // Rambus may be better known for all the lawsuits it started and is still holding against various IT companies, but it seems that the company is still very much working on new technologies, such as differential signaling for SoC-to-memory interfaces.
Rambus's most recent press announcement deals with its newest breakthrough in memory signaling.
The advancements are of Rambus’ Terabyte Bandwidth Initiative and boost power efficiency and compatibility of single-ended memory architectures. This means that GDDR5 and DDR3 will benefit form the milestone.
Basically, the company announced that its differential signaling for SoC-to-memory interfaces have reached a point where they can operate at 20 Gigabits per second.
One asset is the Flexmode interface technology, “a multi-model, SoC memory interface PHY which supports both differential and single-ended signaling and can be used in a single SoC package design with no additional pins.”
The main goal behind Rambus' efforts is to significantly boost the maximum bandwidth that graphics cards can achieve, among other things.
Currently, the upper limit is of 128 GB/s, but future generations should eventually attain one terabyte per second or more.
“We have paved multiple paths for the industry by providing solutions that extend single-ended signaling beyond today’s limits and developing the means for a seamless transition to differential signaling,” said Sharon Holt, senior vice president and general manager of the Semiconductor Business Group at Rambus.
“By advancing data rates in an extremely power-efficient way, and enabling compatibility to current industry-standard memories, we have removed the technical and business barriers for customers to achieve unprecedented capabilities in their products.”
For a more exact list, Rambus' innovations are Fully Differential Memory Architecture (FDMA), FlexLink C/A and 32X data rate. FlexMode is the newest addition to this IP portfolio.
What remains to be seen is how soon companies begin to license this new technology and how fast it is integrated in new hardware.