14 DAY TRIAL // Altera Corporation announced today the launch of the first shipment of EP3SL150 products, which are the first of the new high end Stratix III FPGA family that are built using the 65nm fabrication process. The new product is composed of around 150,000 logic elements and it has the lowest power consumption of all the encountered high density, high performance programmable logic devices on the market today. Because of its low power consumption and high performance, the EP3SL150 is well suited for a wide range of applications like "high performance computing, next-generation basestations, network infrastructure, and advanced imaging equipment" according to a company's press release.
The Stratix III FPGA made by Altera offers a high performance output at a minimal power consumption that can be up to 45 percent lower than the one registered on all competing solutions while over performing all competitors with 25 percent. In the memory manufacturing industry, the Altera built Stratix III FPGAs are offering DRAM producers the only interface that is fully compliant with JEDEC's technical specifications for the newly adopted DDR3 standard. "We see DDR3 becoming the memory solution of choice for next-generation systems requiring high bandwidth," said Raymond Fontayne, segment marketing manager at Micron Technology, Inc. "We are pleased to see that Altera's Stratix III FPGAs provide built-in read-and-write leveling functionality required to allow operation with our DDR3 SDRAM DIMMs and devices."
As the computer hardware industry as a whole is concerned with energy efficiency and power consumption that leads to wasted energy and heating problems, the Altera Stratix III FPGAs are designed to need only a trickle of power while delivering high performance as they feature the Programmable Power Technology which allows them to scale their clock speed and energy consumption according to the workload. This scaling occurs at a low level as it is implemented to be accessible to every programmable logic array block (LAB for short), digital signal processing (DSP for short) block and memory block. Other two power saving technologies, the PowerPlay and the Selectable Core Voltage, allow each block to be controlled based on the global performance requirements, while the other technology can switch between 1.1V for high performance and 0.9V for energy saving.
"Stratix III FPGAs deliver tremendous value to customers with an unmatched combination of low power, high performance and high density," said David Greenfield, senior director of product marketing for high-end FPGAs at Altera Corporation. "Combined with our Quartus II software, Stratix III FPGAs enable compelling differentiation for any high-end system designer concerned about meeting their power or performance targets."