14 DAY TRIAL // End-users may have heard of a certain technology that Intel trumpeted not long ago, but it looks like not all large-scale entities on the IT market are as enthusiastic about it as the chip maker is.
Back near the very start of the ongoing month (May, 2011), Intel stepped up and introduced a new chip making technology.
Known as Tri-gate, it is based around three-dimensional transistors that improve both performance and power efficiency.
We actually covered the announcement here, although it looks like not all top-tier IT players are confident in the new feature.
More specifically, TSMC (Taiwan Semiconductor Manufacturing Company) feels that it is not economically viable for it to integrate FinFETs into its 2xnm technologies.
Between TSMC and its customers, there is a sort of interdependence, meaning that both sides have to fashion their plans in regards to each other's resources.
In other words, TSMC keeps optimizing its process technologies while its customers develop new designs based on what the foundry's chips can do at that point in time.
As such, the chip maker won't be too hasty in modifying its transistor structure, lest it endanger its stability as contract semiconductor maker.
"We need the ecosystem to be ready for FinFETs, which means design tools, IP, design kits and so on. For us 20-nm will be planar," said Maria Marced, president of TSMC Europe, in an interview with EETimes.
For those that want a reminder, 22nm Tri-gate transistor-using chips have an over 50% lower power draw than 32nm planar transistors, not to mention a performance boost of up to 37%.
All in all, there are definite advantages to processors using three-dimensional transistors, especially for mobile devices, where large performance in a small package is the goal (and where power efficiency is a key factor), but TSMC won't start using them until the 14nm node.