14 DAY TRIAL // After being forced to skip a generation following a delay with the previous-generation Tukwilla-based chips, Intel's Itanium family of processors will finally get back on track thanks to the new Poulson architecture which will be detailed during the International Solid State Circuits Conference.
Poulson is Intel's most complex general-purpose processor to date as it features 3.1 billion transistors inside a 588 square millimeter die.
Compared to Tukwilla, the chip doubles the number of cores available (from four to eight), packs a 12-instruction wide pipeline as well as a series of multithreading enhancements, and new instructions to take advantage of parallelism, especially in virtualization.
In addition, the chip features 54MB of total cache, including 32MB of shared L3 cache according to EETimes (some reports suggest that L3 cache size to be set at 48MB).
Just like its predecessor, Poulson will use the same CPU interface and chipsets as Intel's x86-based Xeon server processors while also retaining pin-compatibility with Tukwilla. However, the new architecture gets an upgraded QPI link that is now capable of reaching 6.4 GBps.
The chip is built using the 32nm fabrication process and, as a result, its die size is 20 percent smaller than that of previous Itanium CPUs.
"We are still in our post-silicon phase and to date and have testing to do, but we haven’t seen any issues," said Rory M. McInerney, director of Intel's server CPU team.
Since Poulson is pin compatible with Tukwilla, HP will reuse the existing SX3000 chipset for its future Itanium servers.
"We are waiting for more details from Intel on its Poulson follow on [code named Kittson] to determine what we do with next chipset," said Michael McBride, an engineering manager in HP Business Critical Systems group.
The Itanium CPU family is specially designed to be used in enterprise servers and high-performance computing systems.