14 DAY TRIAL // A high-ranking official of Maxeler Technologies, a company that develops HPC accelerators based on field programmable gate array (FPGA) devices, has recently expressed its doubts about the success of Intel's Knights Ferry co-processor card in the HPC sector.
In an interview with the Inquirer, Oskar Mencer, CEO of Maxeler said, "Intel's goal is to make machines easier to program," while HPC customers "care more about performance and operational cost."
Intel introduced its Knights Ferry co-processor boards at the International Supercomputing Conference and these are designed to compete with AMD's FireStream and Nvidia's Tesla GPGPU solutions as well as with other FPGA-based accelerators.
According to Intel, the biggest advantage that Knights Ferry and its MIC (many-core architecture) holds over its rivals is its compatibility with x86 programs.
However, Mencer doesn't believe that Intel's approach is the right one and, although he admits that FPGAs are harder to program for, also states that "more effort leads to greater performance."
Maxeler's CEO continued explaining how paying an experienced coder more money at the start to code for FPGAs will enable the company to save on costs on the long term, by taking advantage of the lower power and space requirements, provided by such solutions.
In addition, the company official also believes that for Intel "HPC is a PR activity, a showing off activity," and that in no way is Intel interested in going after specialized HPC vendors.
Performance could also be a problem as certain FPGA devices, when programmed properly, can offer more than ten times better performance than Intel's Knights Ferry development kit.
Expected to arrive in 2012, Intel's accelerator board will be built using the 22nm fabrication node and will carry roughly fifty x86 microprocessor cores.