14 DAY TRIAL // Scientists at IBM, the Purdue University, and the University of California in Los Angeles (UCLA) announce the creation of a new generation of ultrasmall transistors and advanced computer processors, which rely solely on the massive improvements made possible by semiconducting nanowires. These small-scale structures are made of tweaked vertical silicon structures, which hold great promise for advancing the general level of computing performances currently possible with silicon chips. The work is detailed in a research paper, published in the November 27 issue of the top journal Science.
The key achievement that the science group made was figuring out a way of creating the silicon structures with additional layers of other materials. The newly added chemicals are organized in very precise patterns, which are thoroughly defined down to the atomic level. “Having sharply defined layers of materials enables you to improve and control the flow of electrons and to switch this flow on and off,” Purdue University Associate Professor of Materials Engineering Eric Stach explains.
Until now, the main approach when it came to creating electronic devices was a process that created “heterostructures” – materials with sharply defined, alternating layers of semiconductors, such as silicon and germanium. While this can easily be achieved at the macroscale, creating these alternating layers at the nanoscale has proven to be extremely complicated, which is why the new accomplishment is so important, experts say. In previous works, layered nanomaterials were obtained, but the lack of definition at the small scale meant that the semiconductors could not perform efficiently and optimally.
Stach adds that the nanowire-based approach may also boost the performance of computer chips, on account of their smaller “footprint.” He explains that conventional chips are constructed on horizontal pieces of silicon, whereas the wires are grown vertically, on a very thin base. This means that more of them could be fitted within the same surface area, which would result in significantly larger performances. “In something like five to, at most, 10 years, silicon transistor dimensions will have been scaled to their limit,” the expert says.