Get it while it's hot

Mar 28, 2007 15:00 GMT  ·  By

The Microprocessor without Interlocked Pipeline Stages is a RISC microprocessor architecture which has seen a lot of usage in a large number of products such as Series2 TiVo, Windows CE devices, Cisco routers, video game consoles and handheld systems. MIPS Technologies is now one of the leading providers of processor architecture and cores for different applications.

STMicroelectronics is licensing the MIPS64 architecture from MIPS Technologies for a project in cooperation with the Chinese Institute of Computing Technologies. The basis for this processor architecture is the RISC (reduced instruction set computer) processor, which is now being used in different implementations by Sun SPARC and UltraSPARC, IBM Power Architecture, Playstation, Playstation 2, Playstation Portable and Nintendo 64.

John Bourgoin, president and chief executive officer at MIPS Technologies said that: "The MIPS64 architecture has long been a preferred choice for major semiconductor companies around the world for its performance, cost and scalability. We're delighted that ST has joined our exclusive network of architectural licensees, and look forward to teaming with them as they continue building out their global strategy for innovative computing solutions."

The idea, that led to the creation of the RISC processor, was inspired by the discovery that many of the features included in a CPU were ignored by the programs that were running on that machine. Optimizing these instructions led to the success they have encountered in the computer industry thus far. The man that made a really big difference and thought to be the "heart" of the MIPS Technology is John Hennessy, now the president of Stanford University. He took the lead in RISC processing and created a streamlined architecture, scalable enough to meet any demands that future generations of applications have had.