A "tock" that looks more like a "tick" for 10nm chipset CPUs

Jun 24, 2015 07:43 GMT  ·  By

Apparently, the 10nm die shrink for Skylake, the Cannonlake, will be replaced - read delayed - by the larger-still "Kaby Lake" chipset.

Changing its roadmap, again, Intel has postponed the Cannonlake 10nm production for a larger 14nm chipset. Featuring two or four cores and including a new integrated graphics engine, the "Kaby Lake" will also have a dual-channel memory controller and 256MB of on-package cache to speed up the graphics workloads.

The Kaby Lakes will come in five processor lines: "Kaby Lake Y," "Kaby Lake U," "Kaby Lake H," and "Kaby Lake S," out of which only the S model will feature LGA 1151 support. According to Benchlife, the S model seems to stand for Skylake architecture hence the exclusive LGA 1151 support.

The new chip appears to be destined to address the various segments of the market, including mobile and desktop clients and will have a design power of 4.5W and up to 91W.

Stagnating progress

Information is scarce about the new chipset, and except that it'll run on 14nm die shrink, it's quite unknown whether it will have a new micro-architecture or it will support AVX-512 instructions.

However, with Intel bringing LGA1151 socket support for the Kaby Lake too, it will make it compatible with "Skylake" systems and motherboards based on Intel's 100-series chipsets. Also, it seems that support for USB 3.1 will appear in its future core-logic sets, together with DDR3L and DDR4. More precisely, U and Y SoC series will enjoy DDR3L and LPDDR3 with no upgrade for DDR4 while the S model will obviously enjoy the latter memory type.

Looking at the available specs, it's very possible, though, that all "Kaby Lake" models except the S series will be another Broadwell as the die size and supporting memory type suggest it. Either Intel is betting all its money on its 14nm technology, hoping for practical and financial reasons to delay the 10nm "tock" advancement in favor of a universal die size, or it didn't fully develop the 10nm "mini-Skylake" architecture, delaying it without having to deal with revenues loss in case no technical advancements are made.