Toshiba Announces Prototype of New FeRAM

Toshiba has announced today the prototype of a new Random Access Memory, dubbed Ferroelectric Random Access Memory, or FeRAM. According to the details provided by the company, its new memory chip is capable of providing a storage capacity of 128-megabits and read and write speeds of 1.6-gigabytes per second, consequently providing the most advanced combination of performance and density achieved so far. Toshiba will provide the full details of the new FeRAM at the International Solid-State Circuits Conference 2009, held in San Francisco, California.
 

The company's new FeRAM chip has been designed to provide the fast operating characteristics of DRAM, enabling the memory's ability to retain data while powered off. The chip is built on a modified version of Toshiba's original chainFeRAM architecture, with the new architecture being capable of preventing cell signal degradation. In addition, the new FeRAM boasts a new circuit that is capable of predicting and controlling the fluctuations of the power supply, supporting high-speed data transfers.
 

Ultimately, this allows the integration of DDR2 interface, maximizing data transfers at a high throughput but low power consumption. According to Toshiba, this can provide for read and write speeds of 1.6 gigabytes per second, while internal testing enabled the company to break its own record of 32-megabit density and 200-megabit data transfers. Performance wise, the new FeRAM allows for up to eight times faster transfer rate and density compared to previous records and the fastest speed of any non-volatile RAM.

According to the specifications made available by Toshiba, its new FeRAM boasts a 130nm CMOS, a density of 128 megabits, bandwidth of 1.6 gigabytes/s (DDR2 interface) and a 1.8V power specification. The company said that it would continue its R&D in FeRAM, aiming for increased capacity and possible use in a wide range of products, including main memory of mobile phones, mobile consumer products, mobile PCs and SSDs.