They set the basis for new types of electronics

Sep 1, 2009 10:56 GMT  ·  By

There is no doubt in any reasonable person's mind that the future of electronics will be entirely based on nanostructures, from wires to switches. Carbon nanotubes are one possible line of development, but their silicon-based counterparts are not far behind, as evidenced by the research conducted by IBM expert Frances Ross in her laboratory. She is using extremely powerful electron microscopes to analyze mushroom-shaped silicon nanowires, less than one-thousandth the width of a human hair in diameter, the New York Times informs.

One of the main reasons why labs around the world are currently orienting their efforts towards studying structures at the nanoscale is the fact that transistor technology is currently reaching its fundamental physical limits of miniaturization. The boom that allowed for the size of conventional transistors to be made smaller and smaller is now deflating, and soon the maximum limits will be reached. Therefore, coming up with an alternative before this happens is important, as this would avert a global stagnation in terms of electronics and computer technology.

And the abrupt end of this trend is not that far away. In spite of the fact that the microprocessor industry, for instance, approaches the ability of setting individual molecules in place, the limits are almost reached. The industry is currently engaged in moving its standards yet again, from a 45-nanometer architecture to a 32-nanometer one, which will again increase computing power and performances and would decrease size. But this miniaturization trend is about to end, leading companies and materials scientists admit.

“Fundamentally, the planar transistor is running out of Steam,” IBM Senior Vice-President and Director of Research John E. Kelly III explained. “We’re at an inflection point, you better believe it, and most of the world is in denial about it. The physics constraints are getting more and more serious,” Stanford University electrical engineer Mark Horowitz added during a chip-design conference held last week, in Palo Alto, California. Another IBM expert, Brad McCredie, said that there was no way around the block, and also that the industry had been employing various tricks to exceed limitations since the 90-nanometer microprocessor architecture first appeared.