14 DAY TRIAL // Intel's upcoming Nehalem micro-architecture is expected to get under the microscope at this year's Intel Developers Forum conference, that will take place in Shanghai, China. The company has provided the press with an architectural update to its roadmap during yesterday's pre-briefing, but more details on the successor of the Core micro-architecture are expected to emerge during the April conference.
According to Pat Gelsinger, senior vice president and general manager at the Intel Digital Enterprise Group, Nehalem is Intel's next milestone in the processor development. It is slated for release during the fourth quarter, as previously announced, and will come with two to eight cores, as well as 4-instruction-wide ISA and multi-threading capabilities.
Intel claims that the addition of the Hyperthreading technology will make the processor "33 percent more parallel", and will account for incredible performance boosts during benchmarks.
One of the most impressive additions is Intel's new Quick Path Interconnect technology, that will replace the Front Side Bus architecture. This will allow Nehalems to deliver higher bandwidths, with data transfer rates up to 25 GB/s per link between the Nehalem processors and the Tylersburg chipset.
The chip will arrive with an updated cache system, that includes three cache levels: the 32 KB L1 instruction cache per core, 32 KB D-cache, 256 KB low latency L2 cache per core, and finally, an 8 MB shared L3 cache pool. Nehalems will also include an integrated 3-channel DDR3 controller that will be able to deliver higher bandwidth values for DDR3-800, 1066 and 1333 memory, as well as support for both Registered and Unregistered DIMMs.
Intel will release a Nehalem chip with integrated graphics later in the product development. the Nehalem will be the alternative for AMD's upcoming Fusion chip, but it will have a great advantage over the latter, thanks to its modular structure that can be scaled according to the market's needs.
For instance, the high-computing customers will be able to enjoy multiple-core graphics units, while the average consumer could pick a low-power solution. However, the similitude between AMD's Fusion and the Nehalem microarchitecture ends here, since the overclocked PowerVR graphics core integrated on the Nehalem silicon won't be able to match the graphics performance of an AMD fully-fledged GPU. Yet, according to Gelsinger, future versions of the chip might integrate the technology used for the Larrabee multi-core graphics architecture.