We know that Nvidia has been working on project Denver for quite some time now. Denver is supposed to be a GPU that also has an ARM CPU fused on the same die, thus making the final chip able to run an operating system directly on the GPU with no need for an AMD or Intel processor.
The first implementation of the Denver project will be next year’s Maxwell. Many say that Maxwell is a 2014 GPU
, but we know that ARM is especially built to be easily fused with various architectures. As such, we believe that at least the prototypes will come out during 2013.
The Denver architecture is a 64-bit design that’s based on the ARMv8 set.
It seems that Nvidia is not going directly for ARM CPU + Nvidia GPU integrated solution.
On its road towards Maxwell, the company is also reportedly
working on Project Boulder and this is somewhat unexpected as Boulder is exactly the opposite of Maxwell.
Maxwell will add a few ARM
cores to a GPU to make it capable of running an operating system.
Boulder, on the other hand, will use large ARM cores that will provide significant out-of-order (OOO) general purpose computing performance and we don’t yet know if it will also have an integrated graphics processing unit (iGPU).
Basically, Boulder seems to be willing to go against AMD’s Opteron
and Intel’s Xeon processors and, unlike some solutions from the two CPU giants, we don’t know if a GPU will also be included on the design.
Readers should take note that “large ARM cores” refer to a full 64-bit implementation of ARM Cortex A15 or an even more complex design.
We believe that this is an important mention as many ARM licensees such as Qualcomm
or Apple have actually simplified the Cortex A15 design before integrating it into their mobile processors.
It’s understandable that the two companies will take this route as their main goal is low power consumption while Cortex A15 has lots of server features that are not actually needed in a smartphone design.
will likely design a complete Cortex A15 implementation or even a more complex one with several FPU units and differential clocking of the integer units.