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September 1st, 2010, 13:07 GMT · By

New Memory Chips Built on Silicon Alone

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Silicon oxide can be used to produce memory bits
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In an achievement that could change the way the electronics industry runs, experts at an American university managed to develop the first two-terminal memory chips made entirely out of silicon.

The accomplishment could have far-reaching implications for the electronics industry, as well as for mamoelectronic manufacturing techniques.

Additionally, it could be used to allow for further miniaturization of electronic equipment, well beyond Moore's Law. Silicon is one of the most abundant substances on the planet, and so the finding catches on new dimensions.

The work builds on accomplishments achieved last year by the team of professor James Tour, who is a chemist at the Rice University.

At the time, his group developed a series of 10-nanometer strips of the carbon compound graphite, which it proved could be used as a robust, reliable memory “bit.”

When the bit was first created, the Rice experts were not exactly sure why it functioned so well. Now, thanks to additional work by scientists Douglas Natelson and Lin Zhong, they do.

In a new study, experts confirmed the breakthrough by eliminating carbon from the mix entirely. This was done when graduate student Jun Yao sandwiched a layer of silicon oxide between semiconducting sheets of polycrystalline silicon.

These served as the top and bottom electrodes, whereas the silicon oxide served as an insulating layer between the two. Yao was the primary author of a new paper detailing the findings.

The work appears in the latest online issue of the esteemed scientific journal Nano Letters. One of the main points it makes is that the nanocrystal wires are as small as 5 nanometers, which is great news.

“The beauty of it is its simplicity,” explains Tour, who is the T.T. and W.F. Chao Chair in Chemistry at the university.

“Manufacturers feel they can get pathways down to 10 nanometers. Flash memory is going to hit a brick wall at about 20 nanometers. But how do we get beyond that? Well, our technique is perfectly suited for sub-10-nanometer circuits,” says the expert, referring to the limits of Moore's Law.

“I've been told by industry that if you're not in the 3-D memory business in four years, you're not going to be in the memory business. This is perfectly suited for that,” Tour concludes.

This investigation was funded by The David and Lucille Packard Foundation, the Texas Instruments Leadership University Fund, the US National Science Foundation (NSF), PrivaTran and the Army Research Office SBIR.

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READER COMMENTS:


Comment #1 by: msahe79 on 13 Sep 2010, 15:50 UTC reply to this comment

great.... it is a two terminal and 3d storage. another step to miniaturization of electronic equipment....

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