New High Performance Electronics Using Linear Arrays of Nanotubes

Single-walled carbon nanotubes have shown potential in the past due to their very attractive electrical properties and physical features; however, incorporating them into feasible integrated circuits is still a challenge because of difficulties in manipulating and positioning molecular size objects in order to achieve sufficient current outputs.

A new approach from researchers at the University of Illinois, Lehigh University and Purdue University is now being developed, and it uses dense arrays of aligned and linear nanotubes as a thin-film semiconductor material suitable for integration into electronic devices.

Arranging nanotubes into arrays that can be transformed to plastic and other unusual substrates for applications such as flexible displays, structural health monitors and heads-up displays can enhance the performance of the devices built with conventional silicon-based technology. "The aligned arrays represent an important step toward large-scale integrated nanotube electronics," said John A. Rogers, a Founder Professor of Materials Science and Engineering at Illinois.

The process of creating the arrays begins with a wafer of single-crystal quartz, on which thin strips of iron nanoparticles are being deposited, which act as a catalyst for the growth of carbon nanotubes by chemical vapor deposition.

As the nanotubes grow past the iron strips, they lock onto the quartz crystal, which then aligns their growth.

So, the resulting linear arrays consist of hundreds of thousands of nanotubes, each approximately 1 nanometer in diameter, up to 300 microns in length, and about 100 nanometers apart.

The thin-film semiconductor material that results from the arrays allows charge to move independently through each of the nanotubes, and so, this configuration can be integrated by conventional chip-making technologies.

Such a typical device, that contains up to 1000 nanotubes instead of only one, which is presently found in all the devices, can effectively multiply the current outputs by the number of nanotubes and produce good device-to-device uniformity, as demonstrated by researchers in experimental transistors and logic gates.

However, it is highly unlikely for us to see silicon being completely replaced by nanotube arrays anytime soon, but adding them to a silicon chip for higher speed operation, power capacity and linear behavior will produce enhanced functionality.

Applications such as flexible devices for which silicon is not suited could also benefit from the use of these arrays.