14 DAY TRIAL // The next generation of powerful computers is just around the corner, claims a team of researchers from the Massachusetts Institute of Technology who has recently developed a new technique that would allow semiconductor manufacturers to integrate even more transistors on silicon chips. By using light with a wavelength of 351 nanometers, the team succeeded in creating parallel interference patterns only 25 nanometers wide.
The 65 nanometer technology has been around for quite a while now, whereas the next generation of 45 nanometer silicon chips is just about to become commercially available and the 32 nanometer silicon chips have already entered the testing phase. However, now even the 32 nanometer technology could help us keep pace in Moore's law in the long run, postulating that the computational power of electronic chips must double every two years.
The current photolithography technique used to create the patterns on silicon chips is limited by the wavelength of used light. Some of the most advanced photolithography techniques have already switched to ultraviolet light with a wavelength of 193 nanometers, but using such wavelengths to obtain even smaller patterns on the chip immediately translates into the use of expensive materials and longer exposure times, making the whole process uneconomical.
But with the help of a 351 nanometer laser, Ralf Heilmann and his colleagues from MIT's Space Nanotechnology Laboratory developed a way to create interference patterns 25 nanometers wide separated by gaps 200 nanometers across, which allowed them to etch 25 nm grooves apart from each other by 175 nm.
Additionally, because the diffraction patters are parallel, they could be used to study deep ultraviolet light. The long wavelength of the laser allows semiconductor manufacturers to go through the grid-writing stage with relative ease, although the construction of the electronic elements would still require a relatively long and complex stage.