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February 21st, 2008, 15:02 GMT · By Bogdan Botezatu

Nanya to Dismiss Partnership With Micron

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Nanya won't leave Qimonda for Micron
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Nanya Technology was reported to have entered a technology partnership with US-based Micron company. The allegations also claimed that the two companies were getting ready to enter a joint-venture
for DRAM chips manufacturing. Nanya was also supposed to kick its German partner Qimonda out of their current business.

The report alleged that Nanya had already inked the memorandum of understanding with Micron, and the two companies were in talks for a technology licensing for DRAM (dynamic RAM) as well as for a new chip factory. The allegations went even farther and the sources even stated the fact that, if the two companies get along well, they would create a new memory joint venture and Nanya will even replace Micron's old partner Qimonda.

According to Nanya's spokesman, the report is anything but accurate and was surely not issued by the two companies' officials. "The [DRAM] industry is in such a difficult situation right now, so there are a lot of rumors. This is just one of those rumors and it is not true," said Pai Pei-lin, a vice president and spokesman of Nanya Technology.

The initial report failed to mention the original sources of the rumor, but was backed up by staff located at the production facilities of both chip manufacturers. If the deal is true, then Qimonda will have to face great production losses. The German company is currently using a totally different memory technology than the rest of the DRAM market, Micron included. Should Nanya leave the partnership, it will have to take all the research and manufacturing costs on it.

Quimonda is currently manufacturing its memory chips using the "trench" process, which is much less popular with the other players in the memory market, that are using the "stack" process. The latter is used by Qimonda's arch-rival, Samsung Electronics. Industry observers even claimed that the "trench" process will have no future since it does not scale as well as the "stack" method when the features on a chip get shrunk.

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