50-core KNC accelerator makes its appearance at SC11

Nov 16, 2011 07:49 GMT  ·  By

The SC11 event, focused on supercomputing products and technologies, is where NVIDIA and AMD both launched several devices and initiatives and, now, Intel is trying to overshadow both with the KNC accelerator.

KNC, short for Knights Corner, is a compute accelerator whose role in a supercomputer is to carry out parallel processing.

In other words, it is meant to have a role similar to what GPU computing modules from Advanced Micro Devices and NVIDIA have succeeded in acquiring in this field.

Any enthusiasm the latter two companies may have shown over the past few days may wane now that Intel's device has been released, though.

NVIDIA's Tesla 2090, the strongest highly-parallel accelerator available, may seem fairly powerful at 665 GFLOPS of peak performance, but it loses clearly to KNC and its 1 TFLOPS double precision floating point performance.

“Intel first demonstrated a Teraflop supercomputer utilizing 9680 Intel Pentium Pro processors in 1997 as part of Sandia Lab’s 'ASCI RED' system. Having this performance now in a single chip based on Intel MIC architecture is a milestone that will once again be etched into HPC history,” said Rajeeb Hazra, general manager of technical computing at Intel datacenter and connected systems group.

KNC has 50 cores and was found to possess this high capability via the double-precision, general matrix-matrix multiplication benchmark (DGEMM).

It might not be such a great threat to GPU accelerators after all, though, because of its form factor.

Rather than being a PCI Express adapter, it looks more like a chip that will be inserted into a card or special sockets.

In other words, there may be a need for special hardware to be developed, which might not be a very appealing prospect, although the integration of 50 cores into a package like this could allow for a higher performance density and, thus, lower space requirements.

Intel will use the 3D tri-gate 22nm process for the manufacture of the 50-core chip and hopes to deliver a supercomputer with exascale-level performance by 2018 (about 100 times higher than what is available today) at only twice the power consumption.