Mass Production of Samsung's 30nm 3-bit MLC NAND Chips Commenced

Korean company Samsung opened up a new possibility for growth in the area of flash memory when it introduced the first 50nm-class, 16Gb multi-level-cell NAND memory device back in 2005. This advancement allowed for flash memory devices to reach performance higher than that of SLC (single-level-cell). After that, flash memory entered a period of rapid advancements, reaching what could be now called the mainstream 2-bit MLC NAND chips. Now, Samsung again scores a point in NAND memory development by beginning mass production of multi-level-cell (MLC) 3-bit chips.

"Introducing cost-efficient, 30nm-class 3-bit technology widens our NAND memory solution base to make NAND even more enticing for increasingly diverse market applications," said Soo-In Cho, executive vice president and general manager of the Memory Division at Samsung Electronics. "Our 3-bit NAND memory will support the development of more cost-competitive, high-density consumer electronics storage solutions."

Although the new chips are not expected to immediately replace the 2-bit, they will most likely become main components in the creation of high-density flash storage devices (above 32Gb). What the new MLC has over the 2-bit is the increased storage efficiency, which allows for data storage increases of 50%. The chips will begin being used in USB flash drives, various micro SD cards and especially flash storage solutions designed to accommodate video usage. Nevertheless, they will, most likely, not replace the 2-bit, especially in the creation of solid state drives that, besides storage capacity, need reliability and a high number of write cycles, areas in which the 2-bit is more proficient.

The chips will be paired with Samsung 3-bit NAND controllers and will initially be used for 8GB micro Secure Digital cards (microSD). The Korean company has also released double data rate MLC NAND memory that, by permitting double data rate transfers to be carried out without increasing power consumption, will likely complement the new chips, allowing for better storage solutions to be developed.