Intel Will Release an HPC-optimized Version of Its Nehalem-EX

In tune with its plans to join NEC in the development of HPC-aimed Xeon processors, Intel means to make as strong an impact as it can in the supercomputing industry. Intel revealed its intention to launch the HPC-aimed Nehalem-EX central processing unit at Supercomputing 2009 in Portland, Oregon. The leading developer of high-speed computing solutions claims that the respective unit will boast improved clock speeds and performance boosts when used in high-performance computing platforms.

The Santa Clara-based chip maker seems to want more than just its current share of the supercomputing segment. Currently, Intel can be seen as holding the record for the number of supercomputers powered by its processors, 402 out of the top 500 to be exact. These systems are mostly used in geophysics, finance and scientific research. The list shows that 20 of the top 50 systems are powered by Intel processors. The most impressive factor, however, is that the recently released Xeon 5500 already powers 21 of the top 500 systems.

The only thing Intel cannot brag about is powering the leading Cray supercomputers. The four top configurations are, to Intel's dismay, powered by none other than its arch-rival, Advanced Micro Devices. This is most likely at least part of the reason why Intel has become so active in this field. The leading CPU developer aims to further increase its hold on this area through its upcoming Nehalem-EX CPU.

The version aimed at HPCs will have six cores instead of the usual eight, but will boast higher clock speeds and some specific tweaks that will enable it to run faster when used in HPCs and supercomputing configurations. Customers will have access to an increased memory bandwidth and will be able to put together “nodes” (single computers) with up to 256 such chips.

The Nehalem boasts a 24 MB L3-cache, a much faster QPI connection instead of the old FSB and support for Hyperthreading. Furthermore, quick data exchange between chips will be possible through the quickpath interface, as opposed to the older Core 2 and Netburst-based Xeons, which still require the frontsidebus and chipset.

Intel supplemented this revelation by also mentioning that a beta program for its Ct technology would become available by this year's end. This technology eases C and C++ programming by automatically parallelizing code across multi-core and many-core processors. This is especially important for promoting Intel Larrabee GPUs, which will also be used in HPCs.

The newly announced hexacore will be launched during the first half of 2010, along with the octacore Nehalem-EX.