QuickSync performance was also improved twofold says the company

Sep 12, 2011 20:31 GMT  ·  By

Even though Ivy Bridge isn't supposed to arrive until the second quarter of 2012, Intel has already started to share some info with the press regarding the performance of these CPUs, as the company expects their integrated graphics to be up to 60% faster then the Sandy Bridge GPU.

More information about Ivy Bridge will be provided during the annual Intel Developer Forum, which is scheduled to take place in San Francisco between September 13 and September 15, 2011.

However, before that happens, Intel has shared some details regarding the performance of Ivy Bridge with the AnandTech publication, which states that Intel's upcoming CPUs will include an updated graphics unit.

Just like the processors based on the current SNB architecture, Ivy Bridge chips will be available in two graphics configurations, the highest performing GPU being called the GT2.

According to Intel, this will include 33% more EUs (processors/execution units/cores) tha the HD 3000 graphics core which will result in a 60% increase in 3DMark Vantage scores (Performance Preset) and a 30% increase in 3DMark '06 scores.

On the other hand, the slower GT1 part, that will be used in most Ivy Bridge desktop processors, will bring a performance increase of 10 to 20%.

Together with the improved graphics speed, the Ivy Bridge integrated GPUs will also gain support for new graphics and compute standards, including DirectX 11, OpenCL 1.1 and OpenGL 3.1.

In addition to improving the performance of the built-in graphics cores, Intel has also brought a series of changes to its QuickSync video transcoding engine.

The Santa Clara chip giant is claiming that all these modifications lead to a twofold performance increase of the video transcoding process as well as to better image quality. These improvements only apply to the Ivy Bridge CPUs coming with GT2 graphics.

Ivy Bridge is expected to make its debut in March or April of 2012, and will be Intel's first processors to be built using the 22nm Tri-Gate fabrication process.