A new range of Xeon Phi coprocessors will be released

Nov 18, 2014 10:45 GMT  ·  By
Xeon Phi PCI Express accelerator, which Knights Landing and Hill probably won't emulate
5 photos
   Xeon Phi PCI Express accelerator, which Knights Landing and Hill probably won't emulate

With both NVIDIA and Advanced Micro Devices revealing their future plans for the high performance computing segment, it would have been odd if Intel hadn’t done something similar. We're going to look at Chipzilla's plans now.

Curiously enough, the Santa Clara, California-based chip maker didn't reveal as many things as NVIDIA did. Probably because it doesn't have a product ready for release just yet.

It has plans for them, sure, but nothing concrete and physically available as of yet. The current-generation Xeon Phi processor range, known as Knights Corner, is still holding the fort.

True, Knights Corner isn't really used officially anymore, since the product line is called the Intel Xeon Phi coprocessor x100 family now.

But until the official product range names of Knights Landing and Knights Hill are revealed, it is best if we stick to the family monikers all around.

New facts in Intel's HPC roadmap

We already knew that a new series of Xeon Phi processors called Knights Landing were in the works, based on 14nm technology.

What comes as news is the successor to that product series. Called Knights Hill, the processors in that range will be built on 10nm tech.

As building blocks for new supercomputers, they won't use the PCI Express Interface, at least not in its normal, slot-like design.

More importantly, Knights Hill will integrate the Omni-Path architecture, which will offer 100 Gbps line speed and up to 56% lower switch fabric latency in medium and large clusters, compared to InfiniBand.

A 48-port switch chip will provide high port density and system scaling, allowing supercomputers to be designed in a more modular fashion, possible to upgrade over time. Currently, InfiniBand is limited to 36 ports. Omni-Path promises 33% more nodes per switch chip, leading to a lower number of needed switches, and thus, simpler and cheaper system designs.

Finally, we're looking at 2.3x higher scaling in two-tier fabric configurations while using the same number of switches.

What we'll see before all that

Knights Landing (not Hill, and thus, no Omni-Path) will be used in the construction of the Trinity supercomputer planned by Los Alamos and Sandia National Laboratories. The Cori supercomputer, announced by The U.S. Department of Energy's (DOE) National Energy Research Scientific Computing (NERSC) Center, will also be designed with it.

Finally, the National Supercomputing Center IT4Innovations plans to make a new supercomputer that will become the largest Intel Xeon Phi coprocessor-based cluster in Europe.

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Intel Xeon Phi (5 Images)

Xeon Phi PCI Express accelerator, which Knights Landing and Hill probably won't emulate
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