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August 9th, 2010, 09:10 GMT · By

Intel MIC Accelerators Get Detailed

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Intel MIC accelerators partially detailed
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While it is busy coming up with better and less power-hungry central processing units for the consumer front, Intel is, naturally, also making sure to progress on the server and HPC (high-performance computing) markets as well. Thus, the Santa Clara, California-based company has been tirelessly working on its more or less fabled MIC (many Intel cores) PCI Express accelerators, the first of which may, in fact, be based on the infamous Larrabee graphics processing unit that, despite Intel's initial optimism, never saw the light of day.

The first MIC that will show up is known as the Knights Ferry and is more of a development platform than an actual product, unlike Knights Corner. As such, it is unclear whether it will be similar to the Knights Corner chip which will be sold to interested parties. What is known about the Ferry is that it will have a significant computing performance and will integrate quite a few features.

For one, the platform has 32 x86 cores, each clocked at 1.2 GHz and equipped with quad-HyperThreading technology. It has up to 2GB of GDDR5 memory and will fit into any PCI Express 2.0 slot. There is also quite a hefty amount of memory, as well as a decent but not at all too large cache memory. To be more specific, the chip has 8MB of shared L2 cache. This may seem somewhat small, but it actually is not, simply because the accelerator is not meant for tasks that rely on it, namely highly-parallel computing. In fact, the products are meant for servers and even HPC applications with x86 compatibility.

The document published by the chip giant is quite extensive but does not mention the GigaFLOPS and/or TeraFLOPS performance of the Knights Ferry. Regardless, when products actually start selling, they will have to contend with NVIDIA's Tesla and AMD's FireStream lines.

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READER COMMENTS:


Comment #1 by: AA on 17 Nov 2010, 19:01 UTC reply to this comment

The peak GFLops (64bit) will be from 153 GF (at 4 FLOP/Cycle; SSE2) to 307 GF (at 8 FLOP/Cycle; AVX).

Single precision (32bit) will be twice: 307 GFLOPS (SSE2) or 614 GFLOPS (AVX).

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