Intel Builds 10 Petaflop Stampede Supercomputer with Xeon Phi

Dell, Intel and the Texas Advanced Computing Center (TACC) may not be quite ready to launch their special project, but they are getting really close and should change the layout of the Top500 supercomputer list when 2013 comes.

We were actually wondering what was taking Intel and Cray so long in updating the world on the status of the Stampede.

The first time we heard about this supercomputer was in April (2012), when the “Knights Cornet” Xeon Phi PCI Express compute accelerators debuted.

Fortunately, even though Stampede will only go online in 2013 (January 7), it is already mostly set up, with just final touches and test being left to enact.

The performance is of 10 Petaflops, which would earn the third spot on the aforementioned supercomputer ranking list.

In addition to the Stampede, Xeon Phi has been selected by Supermico for its Superserver 2027GR-TRF, with four Xeon Phi cards, two redundant 1800W power supply units (PSUs), two Xeon E5 CPUs and 16 memory slots (256 GB RAM).

For those who want to know what each one of the four cards can bring to the table, the specs of the Xeon Phi are as follows.

64 x86 cores provide the system with 256 threads. Each core features its own 515-bit vector unit, which can cover eight double precision SIMD operations.

The performance is of 1 FLOPs, since each core has a clock speed of 2 GHz and gets multiplied by the number of cores (64) and the floating point operations per second (8 FLOPs). The power draw is around 300W.

NVIDIA and Advanced Micro Devices continue to provide higher FLOP performance per adapter, but they have a disadvantage at the software level: they need specialized coding (CUDA or OpenCL). Intel Xeon Phi is made on x86 architecture and, thus, already supports normal software and developer tools (OpenMP, Intel's Threading Building Blocks, MPI, the Math Kernel Library (MKL), etc.).