Intel Aims High In Supercomputing, Exascale Systems Coming

Super computers have been getting very strong lately, but it looks like a certain CPU maker wants to take things not one, but several steps higher, all the way to an ExaFLOP by the end of the decade.

While a certain Santa Clara, California-based CPU maker is making new ULV chips, its other divisions are making progress and plans of their own.

Turns out that it is the supercomputing industry that Intel really has high hopes for, intending to enable Exascale systems by 2020 or so.

Currently, supercomputers are more or less limited to several petaflops of performance, like the Fujitsu K (8 petaflops).

Intel wants to reach an ExaFLOP as soon as possible, so it will invest much time and resources into the MIC architecture.

"While Intel Xeon processors are the clear architecture of choice for the current TOP500 list of supercomputers, Intel is further expanding its focus on high-performance computing by enabling the industry for the next frontier with our Many Integrated Core architecture for petascale and future exascale workloads," said Kirk Skaugen, Intel Corporation vice president and general manager of the Data Center Group.

"Intel is uniquely equipped with unparalleled manufacturing technologies, new architecture innovations and a familiar software programming environment that will bring us closer to this exciting exascale goal."

The Knights Corner CPUs will be the first based on MIC and will have over 50 cores per chip. They will be built on the 22nm process technology and should power a DARPA-funded HPC, among other things.

"The programming model advantage of Intel MIC architecture enabled us to quickly scale our applications running on Intel Xeon processors to the Knights Ferry Software Development Platform," said Prof. Arndt Bode of the Leibniz Supercomputing Centre.

"This workload was originally developed and optimized for Intel Xeon processors but due to the familiarity of the programming model we could optimize the code for the Intel MIC architecture within hours and also achieved over 650 GFLOPS of performance."