Makes 4 predictions on the company's future

Jul 3, 2008 14:53 GMT  ·  By

Pat Gelsinger, a senior vice president and co-general manager of Intel's Digital Enterprise Group held a meeting with a number of journalists this week. The VP used this opportunity to present its predictions in regard to Intel's future, making four assumptions that set Intel as part of every segment of computing.

Gelsinger also presented four of Intel's milestones which were: the introduction of 32-bit technology with the 386 microprocessor, the CISC-RISC debate, the shift to the multi-core technology and the power of compatibility with the so-called Intel Architecture.

Gelsinger's predictions were:

1.Moore's Law will continue to drive the industry. On that note, Gelsinger said that: "We have a good view of what 14[-nm] and [15-nm] will look like, and a good idea of how we'll break through 10[-nm]. Beyond that, we're not sure."

2.Multi-core processors are the way of the future and the number of cores will continue to increase, as part of a "terascale" era of computing. Gelsinger also added that, unfortunately, the software industry still doesn't take advantage of hundreds of threads and cores.

3.Compatibility rules. According to Gelsinger today, designing in backwards-compatibility can take less and less silicone as the transistor count increases and Intel moves to finer and finer technologies. "In 2020, you'll have a petaflop on a chip - well, maybe not there, but in that range - at least 100 teraflops on a chip. And you'll still be able to boot DOS."

4.Intel's Architecture will be everywhere. Especially since Intel's Atom processor has succeeded to take the company into the mobile market, where there's a need for small sized, low on power consumption chips.

Besides that, Gelsinger wanted to make it clear that the company's business decisions have constantly guided Intel all through its history, and how working capital has driven every one of the company's processors.

"That's why RISC failed. It was better," Gelsinger said, about the RISC architecture that his professor at Stanford, John Hennessy, helped develop at MIPS. "Over that time it was better from a pure technologist's perspective, but from a business perspective, it was radically inferior."

According to Intel's Pat Gelsinger the next-generation microprocessors requires a significant working capital, somewhere in the $2.0 to $2.5 billion figure. That figure is nothing as compared to what is needed to move to wafers that are 450mm in diameter. Gelsinger said that this would happen sometime after 2010 and before 2015.