
While everybody is waiting for INTEL to mass produce 45nm CPUs, it seems that they are already thinking out of the box with TSMC gearing up the development of the 32nm-based wafers. Concerning the production of 32nm derivates, INTEL's director of technology strategy Paolo
A. Gargini has said that its development of the 32nm process is "in good shape."
Gargini also claimed that Moore's Law is expected to apply in the CPU segment for the next 10 to a maximum of 15 years. The real problems will challenge Moore's Law when INTEL and TSMC will try to produce 22nm transistor gates using the actual technology mainly because the future shrinkage of the die will have unwanted results if a new process of magnetic shielding is not improved.
It seems that TSMC is already conducting some tests with some 32nm early sampled CPUs. That's good news because we know it works. The real question is how good it works since the actual products are still on early stages of development. As I've said before, the wafer developers won't rely only on the actual technology products but are constantly seeking new ways to lower the current leakage while at the same time keeping the die as small as possible.
Words like three-dimensional packaging, extreme ultraviolet (EUV), double-exposure 193i immersion lithography and multi-gate FINFETs may sound weird now but they might just as well be the only chance there is to produce 22nm parts. Regarding this particular design, Intel has also hinted it will start using tri-gate transistors on its 32nm or 22nm products depending on how good they perform against normal ones.
Gargini said that INTEL's 45nm technology is mature enough and confirmed that mass production will start in the second half of 2007. TSMC may also begin producing 45nm parts in the second half of 2007. TSMC vice president Jack Sun said in June 2006 that the company would start mass shipments of 45nm technology in the third quarter of 2007 at the earliest.