14 DAY TRIAL // In January 2006, INTEL introduced the first dual core CPU, code name "Yonah". Based upon an evolutionary form of the existing Centrino platform, the CPU quickly became a success for INTEL. Core 2 Duo platform followed with the introduction of "Merom" (T5000/T7000 series). And as we all know, both Yonah and Merom were superior to AMD's Turion X2 line when it came to performance.
Napa64 is the following step in the evolution of INTEL's mobile platform. Current CPUs will gain 64bit support in order to be able to run x64 versions of Vista. This is a rather evolutionary than revolutionary step, maybe not the one we've been expecting. But that's not all.
Santa Rosa will be the true proposition to the value market coming from INTEL. As soon as Merom based CPUs will gain FSB 800 support, this new chipset line will also emerge. Based upon an evolved version of ICH8 (Crestline) and the 4965 AGN Wi-Fi chipset (code-named "Kedron") it will also feature Intel's first integrated HSDPA-based, wireless broadband (WWAN) link 1965 HSD. CPUs with 533/667/800 FSB speeds will be supported.
As for the CPUs, the upcoming Merom line will feature the following products: T7100 (1.8 GHz), T7300 (2.0 GHz), T7500 (2.2 GHz) and T7600 (2.4 GHz). Excepting T7100, all the CPUs will integrate 4MB level 2 cache. About the low voltage side, Intel plans to release L7500 and L7300 for Santa Rosa (1.4 and 1.6 GHz), as well as the ultra-low voltage U7500 (1.06 GHz, 2 MB level 2 cache). The Celeron M 520 (1.6 GHz, FSB533) and 530 (1.73 GHz, FSB533) will be 65 nm Merom single-core versions with 1 MB level 2 cache. All these CPUs will eventually be integrated on the Napa64 platform.
As for "Robson", INTEL's technology that uses flash memory in order to speed up boot times and application by using an intermediary buffer based upon flash chips, rumors say it will be available in the 2nd quarter of 2007. What we know for sure is that it will be optional and it will integrate up to 1GB of flash based memory.