IBM scientists are currently researcher on linking DNA molecules with conductive carbon nanotubes. The procedure is extremely complicated because of the small scale the engineers are forced to work at. Once the carbon nanotubes are interconnected, the DNA can be shed off, leaving just an orderly grid of nanotubes. The grid itself is a data storage matrix, but at the same time it can perform basic calculations.

"These are DNA nanostructures that are self-assembled into discrete shapes. Our goal is to use these structures as bread boards on which to assemble carbon nanotubes, silicon nanowires, quantum dots," said Greg Wallraff, an IBM scientist and a lithography and materials expert working on the project. "What we are really making are tiny DNA circuit boards that will be used to assemble other components."

This new goal is an addition to the research on the "DNA origami," conducted by Paul Rothemund of California Institute of Technology. Currently, more and more researchers are turning to DNA in search of an older goal, the "self-assembly".

The advantages of building semiconductors based on DNA and nanotubes are especially concerning the chips' size, given the fact that DNA can work at a 2-nanometer scale. Imagine a chip built at two-nanometer node, then compare it to a state-of-the-art processor built with the 45-nanometer production node.

"There is nothing else out there that we can do that with," said Jennifer Cha, an IBM biochemist working on interlinking the genetic material and the carbon nanotubes. The main challenge in the production process is "convincing" the carbon-based materials to adopt an ordered and precise position. The DNA can do this due to its chemical composition, as guanine and cytosine react in more predictable manners.

"The sequence (of base pairs in DNA) is well known," said Cha. "Most people are acknowledging that DNA and these biological scaffolds are actually quite useful to at least pattern very small systems."

DNA-based chips will allow the industry to send Moore's law to the trash bin, as the chip's surface will dramatically diminish. The technique will also allow chip designers to reduce their budgets for advanced lithography systems.