Hybrid ASIC May Be the Future of Cheap System-on-Chip

ChipX have announced a new class of device to revolutionize the Standard Cell technology. The device is internally called Hybrid ASIC and is alleged to dramatically decrease the non-recurring engineering costs up to $500,000.

Standard Cell technology allows the development of System-on-Chip (SoC) units to feature enhanced performance and small sizes, though requiring a lot of time and money, which would make the business less profitable.

Custom product manufacturing is bearing additional costs and is prohibitive for the vast majority of the companies. The Structured ASIC is a little more efficient in terms of cost, but cripples the integration with other platforms and sizes.

The ChipX Hybrid ASIC approach mixes the benefits of Standard Cell and Structured ASICs at no technological compromise while the production cycle shrinks to 6 weeks and the non-recurring engineering costs drop to $99,000 for the 0.13-micron technology. The company offers a wide array of integrated processors, such as PCI Express, USB 2.0 OTG, Video DAC and ADC.

Hybrid ASIC has a bright future in video compression or data encryption for designers who are to implement identical devices with different compression or encryption algorithms. The chips include Standard Cell logic and I/Os, compiled memory and mixed-signal IP with a predefined configurable logic in a Structured ASIC core and configurable memory. The configurable area of the chip can host extra functionality or can be left empty for future upgrades.

The chip design is flexible and can be easily upgraded, as insertion of configurable memory blocks and I/Os can easily be achieved at no extra production costs. Hybrid ASICs are specific to each customer and can include up to 10M ASIC gates and 10 Mb of memory. The chip design complies with the industry standard design flows and requires only standard EDA tools. The Hybrid ASIC design uses the 0.13-micrometer technology.