Fujitsu Rolls Out 45nm Chips

Fujitsu represents one of the biggest LSI (large system integration) logic chip producer in the world. That statement alone won't be enough especially if you don't have a lot of knowledge related to the VLSI array. The new 45nm technology presented at the 2007 Symposium on VLSI Technology promises to change all that because Fujitsu has managed to produce a really interesting device which could change every aspect of chip integration.

The new 45nm process combines several technologies in order to achieve low power consumption and high performance interconnect. If you compare it with previous 45nm VLSI technologies, the new platform reduces the leakage current during wait-states to one-fifth that of previous levels and it also pulls down the interconnect-induced lag time by about 15% according to Fujitsu.

The manufacturing of shallower drain and source regions is a simple but effective way to reduce various currents (including leakage ones) but in order to do that in practice you need a new manufacturing technology capable of producing the needed source and drain regions. Fujitsu's later annealing technology called millisecond annealing (MSA) does exactly that with the help of higher temperatures that enable the reduction of resistance. As a result it is possible to create shallow sources and drain regions and reduce leakage current even more than before.

Another way of reducing currents is using nano-clustering silica (NCS), which has a dielectric constant (k) of 2.25 - the lowest of any insulating film used until now. The lower dielectric value also has a positive effect on leakage currents but it also helps keeping the power consumption down. Although NCS was partially introduced in 65nm chips, only 45nm ones will fully support NCS arrays. First mass-released VLSI chips that will be built using 45nm process are due to come out in the beginning of 2008.

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