14 DAY TRIAL // Now that the Tegra 2 has managed to make its way into an important number of mobile devices and that the quad-core Kal El chips is nearly final, Nvidia has turned its attention towards the Tegra 3 SoC and one of the most important features that are going to add to this core is an integrated Neon 128-bit SIMD engine.
The Neon engine was designed by ARM in order to accelerate a wide series of multimedia instructions and signal processing algorithms such as video encode/decode, 2D/3D graphics, gaming, audio and speech processing, image processing, telephony, and sound synthesis.
The instruction set was already offered as an optional in the ARM Cortex A8 and A9 chips, but Nvidia wants to extend the functionality of the engine, just as Qualcomm does for its cores.
One of the main features that the Neon instruction set will receive is the addition of 128-bit instruction support, which should bring an important speed improvement in applications that are designed to take advantage of Neon acceleration.
Outside of the Neon engine, Tegra 3 is also set to receive a new graphics core that will most probably be comprised out of 6 vertex and 6 pixel shaders (non-unified).
Just as the current Tegra SoC chips, this GPU won't be programmable and it lacks support for Nvidia CUDA or OpenCL.
According to SemiAccurate, the next-generation Nvidia mobile chip will also be the basis for the development of the Tegra 4. This will be succeeded by Project Denver that was previously known as Tegra 5.
Apart from Tegra 3, Nvidia also plans to launch an updated version of the current Tegra 2 that will feature a quad-core design and will go by the name of Kal El.