Current semiconductor manufacturing methods are not really very revealing, in the sense that experts instruct a machine to perform a series of operations, but they cannot intervene in the process to make adjustments. A new study by researchers in the United States now addresses this shortcoming.
Thanks to this approach the three-dimensional etching of semiconductors can now be monitored in real time. This capability could turn out to be very useful for the electronics industry, since it could save companies a lot of time and resources.
At this time, semiconductors are manufactured by programming a machine to etch certain patterns onto wafers of silicon or other materials. The final structure is thus assembled layer by layer, in a very complex manner, which also takes up a lot of time.
The new monitoring technique was developed by a team of scientists at the University of Illinois in Urbana-Champaign (UIUC), which was led by principal investigator Lynford Goddard. The work was supported by the US National Science Foundation
Details of the investigation appear in the September 28 issue of Nature Publishing Group's open-access, peer-reviewed journal Light: Science & Applications. The paper details how the novel manufacturing approach enables experts to watch and control the etching of semiconductors at the nanoscale.
The essential thing for developing the approach was the combination of real-time observations from epi-illumination diffraction phase microscopy (epi-DPM) with photochemical etching techniques.
Experts tested their method on a process used to create devices called gallium arsenide micro-lenses.
“The instrumentation we are developing will allow engineers to more thoroughly understand the dynamics of their fabrication processes and make fine adjustments to the processing conditions in real-time,” says Goddard, a UIUC engineering professor and NSF CAREER grantee.
“This optical non-invasive, non-destructive technique can monitor the dynamics of semiconductor fabrication processes in real time with nanoscale resolution,” explains NSF program officer Leon Esterowitz, who monitored the Foundation's grant to Goddard.
“This 3-D technique should significantly reduce processing time, improve control of device properties, and reduce fabrication costs for a wide variety of semiconductor devices,” the official concludes.