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CPU, Northbridge and Southbridge on a Single Chip

Intel's Tolapai comes with an integrated DDR2 controller, as well

By Bogdan Solca, Hardware Editor

14th of February 2007, 10:41 GMT

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Intel really did a great job with the Core 2 Duo family, but some nice features, such as the CPU-integrated memory controller are still missing. Hopefully, true Intel DDR2 memory controllers will come with the desktop 45nm CPUs, but until then, Intel wants to merge the Northbridge and Southbridge for their industrial motherboard chipsets.

Codenamed Tolapai, the unified chip is designed for embedded systems on the industrial computer market, and is set to compete with rival VIA C7 and AMD Geode architectures. It should be using a
65nm manufacturing technology and it not only combines the North and South bridges into one single chip, it also adds a low power Intel Pentium M CPU in the 1088-Ball FCBGA chip package, measuring only 3.75cm x 3.75cm. Incorporating a Pentium M based core, the new chip could be adopted into any IA-32 operation system without any change to drivers and applications. Intel claims that Tolapai would constitute the best and most powerful way to advance the embedded system and industrial computer market, helping in minimizing the form factor.

As an all-round solution, Tolapai has a built-in DDR2 memory controller, supporting different DDR2 speeds at 400 MHz, 533MHz, 667 MHz and 800MHz. Dual Channel and ECC capabilities are also included in this new processor, and the highest memory capacity supported is 2GB. I/O features coming with Tolapai include: Gigabit Ethernet (RGMII, RMII), IEEE 1588 Time Sync, one MDIO, 133x GPIO, two UARTs, two SMBuses, two CANs (Controller Area Network), one Sync Serial Port (SSP), one 16Bit PCI, five PCI-E, two SATA 2.0 and two USB 2.0 ports.

Intel also prepares an "Acceleration Services" edition for Tolapai, which integrates enhanced hardware security services including AES, 3DES, RC4, MD5, SHA-1, SHA-224-256-384-512, HMAC, ESA and DSA up to 1.6Gbps. The chip may be featuring a TDM interface, make IP Telephony possible on small-factor PCs.

Tolapai has 3 different FSB settings, allowing for 600MHz, 1.06GHz and 1.2GHz settings, while its TDP varies from 13W to 25W. Reference prototypes should be available in Q2 and final models are set to ship in late 2007.
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