ARM Chips to Power Exascale Supercomputer Built by European Consortium

A consortium comprised of leading computing companies in Europe and research institutes, has just announced that it plans to develop a new type of computer architecture based on ARM processors that will be able to deliver exascale performance while using 15 to 30 times less energy than today's systems.

This new project, called Mont-Blanc, is coordinated by the Barcelona Supercomputing Center (BSC) and has a budget of over 14 million Euros, including over 8 million Euros funded by the European Commission.

Its main goals are to develop a fully functional energy-efficient HPC prototype using low-power ARM cores already available in today's embedded devices and to overcome the limitations identified in this prototype machine, as well as to built the exascale applications required to take advantage of this system.

Energy efficiency is a key aspect of the system, as this is expected to be able to deliver 1000 PF (1 Exaflops/s) in 2020 with a power budget of 20MW.

“First, we must take into account that not all energy is used for computing within the cores. In current systems the processors consume the lion's share of the energy, often 40% or more,” says Alex Ramirez, leader of the Mont-Blanc project.

“The remaining energy is used to power up the memory, interconnection network, and storage system.

“Furthermore, a significant fraction is wasted in power supply overheads, and in thermal dissipation (cooling), which do not contribute to performance at all,” concluded Mr. Ramirez.

The Mont-Blanc project brings hardware companies such as Bull, a major HPC system vendor, ARM, a company well known for its energy-efficient processors, and Gnodal, which will develop the interconnect used in the exasclae machine.

Besides the technology providers, Mont-Blanc unites supercomputing centres from the four Tier-0 hosting partners in PRACE (Partnership for Advanced Computing in Europe) who have roles in system software and exascale application development.

In order to assess the different hardware and software components made available during the project, an incremental approach will be used, working on both the porting and the optimization of small kernels, and then on end-users scientific applications.