14 DAY TRIAL // Every x86 compatible processor has a number of hardware-based instructions that are grouped in sets and are integrated in the design of the CPU by its manufacturer. From the old and venerable MMX instructions extension set that was designed years ago in order to give Intel processors a better performance in the multimedia department and to the latest SSE instruction set that extends the capabilities of the next generation of CPUs, all the instructions that were implemented at a hardware level are aimed at improving the processors' performance and response times for a particular class of problems. When the first multicore processors hit the market, there was the problem of a new set of instructions that should make better use of the new CPU capabilities like parallel computing and so on.
Now, it looks as if Advanced Micro Devices takes the multicore computing very seriously as the company announced that soon another extension of the x86 instruction set will be launched and this one will be aimed at improving performance for applications running on processors based on a dual or quad core architecture. "Developed to improve the performance of the highest intensity applications, the instructions help the developer community get greater performance out of each instruction by introducing functionality found only in specialized, high-performance architectures," said an AMD spokeswoman, describing the new initiative, who was cited by the news site extremetech.
AMD is interested in a new set of instructions dedicated to parallel and multicore computing as the company tries to improve the performance of its products and make them more competitive than Intel's. Already AMD announced the Extensions for Software Parallelism initiative of which the first part, the Lightweight Profiling Proposal was launched a few days ago. This initiative is aimed at developers and tries to give them a new set of processor based instructions in order to allow them to optimize their own code and applications.
The software instruction sets will most certainly be accompanied by the hardware implementation at processor level, but a date for the new processors was not announced. "Last week, AMD announced the availability of an early specification describing Light-Weight Profiling, a technology supporting the recently introduced Hardware Extensions for Software Parallelism initiative," the AMD spokeswoman said. "That was something different, but closely related." Usually, AMD left the development of new set of processor instructions to Intel, then licensed them for use in its own processors. There are of course exceptions from this rule as the multimedia 3DNow set and the A64 set that marks the transition to 64 bits based computers. As the Barcelona based processors are soon to hit the market, the new set of instructions will be implemented at hardware level in a few months most probably.