AMD, the world's second largest microprocessor maker, has disclosed its plans to introduce the enhanced multi core processors that support built in DDR3 memory controllers. It is included also the present platform that allows more than 8 physical chips to be installed on a single system.

The DCA2.0 (Direct Connect Architecture 2.0) is set to be introduced by 2008, and will improve the interconnection between processors and processing engines with a chip. The new architecture will allow the connection of more than the actual number of 8 processors in a single memory system, eliminating the need for additional logic drives. The company plans include the easy building of a 32 way system.

Moreover, AMD and its infrastructure partners are planning to incorporate the DDR3 memory technology support. As earlier announced, this kind of product samples are set to appear in 2007. For consumers, the first DDR3 supporting products, like AMD Sempron and Athlon 64 processors, will be available in 2008, the company said.

Recent news also reported that AMD is planning to commercially launch in 2007 quad core chips, to extend the AMD64 instructions, and to introduce the Hyper-Transport 3.0 interconnection protocol and the F8-DIMM support for servers.