Jan 18, 2011 12:11 GMT  ·  By

With 2011 in full swing, it’s time for AMD to start building hype for their upcoming processors based on the Bulldozer architecture that are supposed to drop later this year; so, recently, the company just released some images of a 300mm wafer full of Orochi 32nm chips.

Bulldozer will be AMD's first major architecture redesign since 2003, when the company introduced the Athlon 64 (K8) processor family.

The chips are based on GlobalFoundries' 32nm SOI (silicon on insulator) with HKMG process technology and they feature a new approach to multi-threaded computing that eliminates some of the redundancies coming with traditional multi-core designs.

As a result, the CPUs are based on a modular architecture based on Bulldozer cores.

Each such module will be seen by the operating system as two separate cores, and is made up of two 128-bit FMA floating point units, which can be combined into one 256-bit FPU, two integer cores, with four pipelines each, and as much as 2048KB of L2 cache.

This can be shared among all modules and is backed up by up to 8MB of L3 cache.

All the chips will support AMD's Turbo Core technology, offer native DDR3-1866 memory support, Hyper Transport 3.1, desktop processors featuring a built-in dual-channel memory controller while server CPUs get quad-channel memory support.

Orochi family chips, will feature four such modules to form eight core processors.

In the picture provided, the modules can be easily distinguished together with the L3 cache.

Each Bulldozer module used for Orochi has 213 million transistors in an area of 30.9mm², including 2MB of L2 cache memory.

According to some leaked AMD marketing slides, an eight-core Bulldozer processor is on average 50% faster than a Core i7 900-series CPU.

First AMD Bulldozer chips should arrive in April 2011, desktop processors following to use the AM3+ socket (via SemiAccurate).