Infineon announced that they have developed multi-gate FINFET transistors (known as 3D transistors) that substantially reduce the amount of leakage current. The potential of multi-gate transistors, which has been explored by firms such as IBM, TSMC and Infineon, could emerge into an efficient solution of controlling the power usage. FINFETs (FIN Field Effect Transistor) could prove to be very efficient when regarding power consumption but the real application here resides in a way to integrate this technology into Future Z-RAM products (Z-RAMs allow for smaller transistor chips resulting for example into smaller l2 caches that incorporate the same amount of memory)

The company developed a 65 nm chip, which is said to contain "more than 3000 active transistors fabricated in three-dimensional multi-gate technology." Tests have shown that multi-gate transistors are "just as powerful as today's mature technologies, " said Infineon. However, the new approach drains "as little as half as much energy for the same functionality," the company claims.

In fact, the decrease of leakage current results in less consumed power. Leakage current physically translates into a certain amount of current that is wasted between the gate/drain and source and the loss occurs even if the transistor is inactive. About the new technology, Infineon claims that the 3000-transistor test chip showed about 10 times less leakage current than a single-transistor chip. They also added that the factor could increase beyond 10 with the introduction of 32nm process and that could easily double battery time for a 3D transistor-based laptop. And it could also significantly shrink dies. Infineon says that using the 3D 65 nm multi-gate transistor architecture requires about 30% less two-dimensional space than single-gate technology.

Infineon's multi-gate transistor technology is still under heavy research so don't expect any 3D chips to come out until 2012 or even later.